发明名称 |
Method and apparatus determining order and identity of subunits by inputting bit signals during first clock period and reading configuration signals during second clock period |
摘要 |
A unit train (10) includes a base unit (12). Base unit (12) generates a clock signal and a bit signal. Base unit (12) also receives and interprets a data signal. Unit train (10) also includes a plurality of subunits (14) serially coupled in a certain order. Each subunit (14) receives the clock signal and the bit signal. Each subunit (14) also generates a portion of the data signal. Additionally each of the subunits (14) has a corresponding identity. Also included in the unit train (10) is a clock/data line (67) for relaying the clock signal and the data signal between the base unit (12) and each subunit (14).
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申请公布号 |
US5594925(A) |
申请公布日期 |
1997.01.14 |
申请号 |
US19930000755 |
申请日期 |
1993.01.05 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HARDER, STANLEY D.;HOUGHTON, RICHARD A.;WALLACE, RICHARD H. |
分类号 |
G06F13/42;(IPC1-7):H01J3/00 |
主分类号 |
G06F13/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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