发明名称 |
Arbitration protocol for a bidirectional bus for handling access requests to a logically divided memory in a multiprocessor system |
摘要 |
The invention concerns a multiprocessor system comprising processors PU0 to PUn and a common main memory. The memory is logically divided into at least two banks M0 and M1 and is interconnected with the processors by a bus 110. By means of control lines 111 to 118 a bus protocol is established so that one of said memory banks is accessed while another one of said banks is still busy.
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申请公布号 |
US5594876(A) |
申请公布日期 |
1997.01.14 |
申请号 |
US19950514355 |
申请日期 |
1995.07.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GETZLAFF, KLAUS J.;WILLE, UDO |
分类号 |
G06F13/18;G06F13/362;G06F13/368;G06F13/38;G06F15/16;G06F15/177;(IPC1-7):G06F13/00 |
主分类号 |
G06F13/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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