| 摘要 |
<p>PURPOSE: To convert data whose word width is 10 bits of a SMPTE-259M (SDI) system into data whose word width is eight bits, which fits for an ATM system. CONSTITUTION: A FIFO circuit 414 sequentially stores highest eight bits for AES/EBU data four words included in 10 bits parallel data S180. A FIFO circuit 416 stores lowest two bits for AES/EBU data four words. DFF circuits 4180 -4183 hold lowest two bits outputted from the FIFO circuit 416. A selector circuit 420 multiplexes data stored in the FIFO circuit 414 with data stored in DFF circuits 4180 -4183 and added dummy bits and generates eight bits parallel data S44.</p> |
