| 摘要 |
<p>PURPOSE: To stably make the phases of input and output signals different by 90 deg. in spite of a frequency change in the input signal. CONSTITUTION: When an input voltage expressed by vin=E.sinωt is impressed to an input terminal 24, corresponding to a current to flow to a capacitor (capacitance value C) 23, a current i1 is let flow to a first transistor 1 and a current i2 is let flow to a second transistor 2. That current il is let flow to a 14th transistor 14 by a current mirror circuit composed of the 2nd and 14th transistors 2 and 14 as well and further, the current i2 is let flow to a 15th transistor 15 by a current circuit composed of 4th and 15th transistors 4 and 15 as well. Then, a voltage drop caused by an output resistor (resistance value R) 26 occurs and as a result, an output voltage, whose phase is delayed by 90 deg. in comparison with the phase of the input voltage) expressed by vo=2 R.ω.C.E.sin(ωt-π/2) can be provided.</p> |
