发明名称 SHELF FORMATION METHOD AND BONDING OF MULTILAYER PRINTED-CIRCUIT BOARD
摘要 <p>PURPOSE: To obtain a shelf formation method in which a prinetd-circuit board with a multistage bonding shelf can be manufactured easily, in which a printed- wiring board used to mount a semiconductor chip or the like can be manufactured with high accuracy and at low costs and in which a printed-circuit board, for a pin-grid array, with a bonding shelf and a printed-circuit board for a ball-grid array can be manufactured with high accuracy and at low costs by making use of it. CONSTITUTION: In a shelf formation method for bonding of a multilayer printed- circuit board, a bonding terminal 15 is formed in advance in a multilayer printed-circuit board which has formed a circuit 7 at the inside, a resin layer 8 which is situated at the upper part of the terminal 15 in an inner layer 2 is then removed, an opening is formed, and a bonding shelf 12 in which the terminal 15 is exposed is formed.</p>
申请公布号 JPH098175(A) 申请公布日期 1997.01.10
申请号 JP19950171391 申请日期 1995.06.14
申请人 FUJI KIKO DENSHI KK 发明人 HIRAKAWA TADASHI
分类号 H05K3/46;H01L23/12;(IPC1-7):H01L23/12 主分类号 H05K3/46
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