| 摘要 |
1,122,222. Transistor switching circuits. MULLARD Ltd. 11 Feb., 1966 [25 May, 1965], No. 22117/65. Heading H3T. A gating circuit, for attenuating unwanted switching transients occurring on a sense line of an information storage matrix, comprises two insulated gate field effect transistors (e.g. MOSTS) 2, 3 connected in series between a signal input (transformer 1) and a reference potential 9, with their common point connected to a signal output (amplifier 8); means for biasing the transistors 2, 3 to a non-conductive and a conductive, state respectively; and means for conveying switching pulses to the transistors to reverse their states. With transistor 2 cut off and transistor 3 switched on, the switching transients, which would otherwise paralyse the amplifier 8 and prevent its response to the subsequent information signal, are attenuated in transistor 2 and pass to earth through transistor 3. A negative switching pulse is then applied to the base of transistor 4 causing pulses of opposite polarity to be passed to transistors 2, 3 changing their states so that the information pulse passes through transistor 2 to amplifier 8 with no attenuation. Transistors 2, 3 may be of complementary type and driven by the same pulse form. Transistor 4 may be replaced by a PNP device which provides the advantage that transistor 2 switches on fractionally before transistor 3 so that its switching transient passes to earth through transistor 3. The faster switching of an NPN device is normally preferred, but, with an NPN device, the above advantage as regards non-coincident switching may be provided by interchanging the connections of capacitors 18, 19 to transistor 4. Any remaining transients are insufficient to cause paralysis of amplifier 8. The two field effect transistors may be formed on a common substrate which is then connected to a potential more negative than any applied to the gates. |
