发明名称 |
High resolution, large multiplication factor digitally-controlled frequency multiplier |
摘要 |
A frequency multiplier circuit generates an supplemental high-frequency timing signal from a single, low-frequency current-controlled oscillator (CCO). The current-controlled oscillator (CCO) generates a controlled discharge current and a controlled bias current which are controlled in parallel to substantially eliminate inaccuracies in a characteristic frequency-current curve of the current-controlled oscillator. The frequency multiplier circuit generates a high-frequency timing signal using the digitally-controlled CCO and avoids the usage of a phase-locked loop (PLL) technique. Specifically, a frequency multiplier includes a current-controlled oscillator having a plurality of input lines connected to receive a digital current select signal and having an output terminal connected to carry a timing signal at a current-controlled oscillator frequency fCCO set in accordance with the current select signal. The frequency multiplier further includes a control circuit having a first timing input terminal connected to the current-controlled oscillator output terminal to receive the current-controlled oscillator frequency fCCO, output lines connected to the current-controlled oscillator digital current select input lines, a second timing input terminal connected to receive a timing signal at a reference frequency fREF, and a plurality of input lines connected to receive a programmable frequency multiplication factor.
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申请公布号 |
US5592129(A) |
申请公布日期 |
1997.01.07 |
申请号 |
US19950494575 |
申请日期 |
1995.06.22 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
FRIED, RAFAEL;ROZIN, EYAL |
分类号 |
H03B1/00;H03K3/0231;H03L7/181;(IPC1-7):H03B5/24;H03L7/18 |
主分类号 |
H03B1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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