发明名称 |
CMOS EEPROM cell with tunneling window in the read path |
摘要 |
A CMOS memory cell including PMOS and NMOS transistors with a common floating gate. The CMOS memory cell includes a first capacitor connecting a first control voltage to the common floating gate and a second tunneling capacitor connected from the common floating gate to the source of the NMOS transistor. The tunneling capacitor includes a tunneling oxide region utilized to charge or discharge the floating gate during program or erase. The CMOS cell further includes a pass transistor with a source to drain path connecting the source of the NMOS transistor to a second control voltage.
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申请公布号 |
US5587945(A) |
申请公布日期 |
1996.12.24 |
申请号 |
US19950554092 |
申请日期 |
1995.11.06 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
LIN, JONATHAN;PENG, JACK Z.;BARSAN, RADU;MEHTA, SUNIL |
分类号 |
G11C16/04;H01L27/115;(IPC1-7):G11C16/02 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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