发明名称 Universal programming interface for clock generators operable in a parallel programming mode and a serial programming mode
摘要 A programmable frequency synthesizer includes a first memory (e.g., ROM) for storing a plurality of pre-programmed frequencies, a second memory (e.g., RAM) for storing at least one user input programmable frequency, and dual purpose frequency synthesizer inputs for providing command address information to select one of the pre-programmed frequencies from the first memory and for providing serial data representing a user input programmable frequency to be stored in the second memory. The frequency synthesizer further includes a control input and decoder for directing the address information and the user input programmable frequency data to the first or second memory, respectively.
申请公布号 US5586309(A) 申请公布日期 1996.12.17
申请号 US19940341036 申请日期 1994.11.15
申请人 SIERRA SEMICONDUCTOR CORPORATION 发明人 LIN, TAO
分类号 G04G3/02;G06F1/08;G09G5/18;H03K5/13;(IPC1-7):G06F1/02;H02J1/00 主分类号 G04G3/02
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