| 摘要 |
PURPOSE: To recover a bit clock with digital signal processing. CONSTITUTION: Oversampling is carried out for a reception signal by using a self-running clock with a frequency being an integral multiple of a symbol rate. The receiver is provided with an A/D converter means 24 digitizing a sample value and an adder means 25 adding digitized sample values with synchronization over a prescribed period for a symbol interval, a detection means 26 detecting a symbol identification point from the result of synchronization addition, a decoding means 27 decoding data based on a sample value at a symbol identification point, a detection means 28 detecting a displacement of the symbol identification point timewise as a phase shift, a variable frequency divider means 30 frequency-dividing the frequency of the self-running clock to recover the bit clock, a control means 29 controlling a frequency division ratio of the variable frequency divider means to correct the phase shift, and frame synchronizing signal generating means 31, 32 extracting a known synchronization word from decoded data to acquire frame synchronization and generating a frame synchronization timing based thereon. |
