| 摘要 |
PCT No. PCT/JP93/00381 Sec. 371 Date Nov. 29, 1993 Sec. 102(e) Date Nov. 29, 1993 PCT Filed Mar. 29, 1993 PCT Pub. No. WO93/20457 PCT Pub. Date Oct. 14, 1993Each of test channels CH1-CHN includes a level/timing comparator section 201-20N for making a logic decision on the level of an input signal at strobes STRB1 and STRB2, and a logic comparator section 301-30N for making a logic comparison between the result of the logic decision and an expected value signal EXP1-EXPN to output or inhibit the result of the logic comparison in accordance with comparison control signals CPE1, CPE2. Further, there are provided mode switching circuits 81-8N and mode switching signal generators 131-13N. Each of the mode switching circuits alters the comparison control signals CPE1, CPE2 as desired by mode switching signals CONT1, CONT2 and CONT3 of the corresponding test channels and logic operations, and controls whether or not to apply the altered comparison control signals to the corresponding logic comparator sections 301-30N in accordance with the pin control signals of the corresponding test channels. |
