发明名称 ANALOG MEMORY CIRCUIT
摘要 PURPOSE: To obtain an analog memory circuit employing a switch current circuit in which the number of elements is decreased. CONSTITUTION: The analog memory circuit comprises a sample hold circuit 14 receiving a sample signal 18, a first analog switch 12 having one end connected with the analog signal I/O terminal 11 and the other end connected with the sample hold circuit 14, and a second analog switch 13 having one end connected with the current supply terminal 15 and the other end connected with the sample hold circuit 14. The first analog switch 12 is subjected to on/off control by an I/O signal 16 while the second analog switch 13 is subjected to on/off control by a hold signal 17. The sample hold circuit 14 is controlled by the sample signal 18 to sample or hold an analog signal inputted through the I/O terminal 11.
申请公布号 JPH08297990(A) 申请公布日期 1996.11.12
申请号 JP19950102096 申请日期 1995.04.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MICHIMASA SHIRO
分类号 G11C27/00;G11C27/02 主分类号 G11C27/00
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