| 摘要 |
<p>PURPOSE: To prevent malfunction owing to external noise and to reduce a hardware scale by synchronizing timing with the slot timing of a time divisional multiplex system in a device through the use of a timer control unit(TCU) controlling timing in one chip CPU. CONSTITUTION: A 4M bus counter circuit 2 receives a 4M clock (a) and a frame synchronous clock (b), subdivides one frame for showing the slot position of time divisional mutliplex constitution and counts relative time in one frame. CPU 6 reads a designated count value, judges the setting timing of TCU 5 based on the count value which is read and executes initialization.</p> |
