发明名称
摘要 PURPOSE:To avoid simultaneous throw-in of a plurality of basic section power supply boards and to minimize surge current by throwing in only an interrupted basic section power supply board, according to a predetermined sequence, at the time of reclosing after power interruption. CONSTITUTION:When a common section power supply board 11 detects recovery of power of an interruption detecting circuit 21, a pulse generating circuit 23 produces a simultaneous power throw-in signal (a) of logic '0' pulse and provides power throw-in signals (b), with predetermined time differences, to respective basic section power supply boards 15. In a basic section power supply board 15 where power interruption is detected, the power throw-in signal (b) fed from the common section power supply board 11 is valid because an instantaneous detection signal (d) is logic '0' whereas an interruption detection signal (c) is logic 'l', and reclosing is carried out correspondingly. In a basic section power supply board 15 where power interruption is not detected, the power throw-in signal (b) is invalid because the signals (c) and (d) have logic '0' and thereby power is not thrown.
申请公布号 JP2549186(B2) 申请公布日期 1996.10.30
申请号 JP19900117207 申请日期 1990.05.07
申请人 FUJITSU LTD 发明人 SAKURAI HIROSHI;HASHIMOTO SHIGERU
分类号 H02J1/00 主分类号 H02J1/00
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