发明名称 |
CPU BUS ALLOCATION CONTROL |
摘要 |
An arbiter with first and second CPU timers is provided which advantageously allows measuring and controlling CPU bus ownership intervals via the arbiter. The first CPU timer, a running timer, specifies the total interval that the CPU is allocated the bus. The second timer, an idle timer, specifies an interval which the CPU may own the bus without performing an operation. The arbiter uses these two timers to dynamically adjust and control CPU bus ownership.
|
申请公布号 |
CA2071306(C) |
申请公布日期 |
1996.10.22 |
申请号 |
CA19922071306 |
申请日期 |
1992.06.16 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BOURY, BECHARA FOUAD;LOHMAN, TERENCE JOSEPH;NGUYEN, LONG DUY |
分类号 |
G06F13/18;G06F13/30;G06F13/362;(IPC1-7):G06F13/366 |
主分类号 |
G06F13/18 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|