| 摘要 |
A semiconductor memory device of this invention includes a semiconductor substrate, a plurality of memory cell units each having a plurality of memory cells each of which has a charge storage layer and a control gate stacked on the semiconductor substrate and in which the write and erase operations are effected by transferring charges between the charge storage layer and the semiconductor substrate as one unit, a plurality of data lines for transferring data with respect to the plurality of memory cell units, and a plurality of selective transistors arranged between the plurality of memory cell units and the plurality of data lines and each having a first end connected to a corresponding one of the plurality of memory cell units and a second end connected to a corresponding one of the plurality of data lines. The plurality of selective transistors are formed of thin film transistors having thin film semiconductor layers formed on the plurality of memory cell units as channel sections thereof.
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