发明名称 CLOCK CONTROLLER
摘要 <p>PURPOSE: To reduce the current consumption of every oscillation circuit itself by providing the oscillation circuits of plural systems and properly select these oscillation circuits according to the system operating conditions. CONSTITUTION: Two oscillation circuits 11 and 12 are used for the low and high speed operations respectively. A clock control circuit 16 performs the ON/OFF control of both circuits 11 and 12 according to the system operating conditions. Therefore, the clock signal (CLK1) oscillated by the circuit 11 is supplied to a CPU 14 and a CPU peripheral circuit 15 respectively via a selector 13 as a system clock signal (SYSCLK) in a low speed operation mode. On the other hand, the circuit 12 is kept in a halt state by the oscillation control signal (CLK2BEN0) of the circuit 16.</p>
申请公布号 JPH08272478(A) 申请公布日期 1996.10.18
申请号 JP19950069936 申请日期 1995.03.28
申请人 TOSHIBA CORP 发明人 NOMURA HIROSHI
分类号 G06F1/04;G06F1/06;G06F1/08;(IPC1-7):G06F1/04 主分类号 G06F1/04
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