| 摘要 |
PURPOSE: To provide the BCD/binary conversion circuit in which optional BCD with a large bit number are converted and which can be incorporated in a PLD or a gate array. CONSTITUTION: The conversion circuit consists of a shift register 1, a latch register 3, a zero conversion section 4, a constant selection section 5, and a 1-bit adder section 6. BCD data to be converted are set initially to the shift register and whether or not the level of each bit over the low-order 4th bit of the BCD data is logical 0 or 1 is detected, latched in the latch register 3, and each bit is set to logical 0 and set again to the shift register 1. The conversion data are created in a binary form to the shift register by adding data in the shift register 1 up to the most significant bit in the unit of bits to data in a binary form corresponding to the data from the latch register 3 succeedingly. |
