| 摘要 |
PURPOSE: To provide a method of manufacturing a semiconductor memory device which is enhanced in yield, easily lessened in manufacturing cost, miniaturized, and easily lessened in operating voltage. CONSTITUTION: A word line 111 is connected to the gate electrodes 104 of transfer transistors Q3 of adjacent memory cells. A word line 111' is connected to the gate electrodes 104' of transfer transistors Q4 of adjacent memory cells. A grounding line 110 is connected to the source regions of driver transistors Q1 and Q2 . The word lines 111 and 111' and the grounding line 110 are formed of the same wiring layer different from a wiring layer of the gate electrodes 104 and 104'. The grounding line 110 is used for shielding the driver transistors Q1 and Q2 and TFTs Q5 and Q6 and others. Drain contacts 112 and 112' are provided with the chamfered sides, and the grounding line 110 is provided to each of the drain contacts 112 and 112' between the chamfered sides. |
