ANALYSER FOR MULTIPORT ANALYSIS, TIME-STAMP SYNCHRONOUS AND PARALLEL COMMUNICATION

摘要

PROBLEM TO BE SOLVED: To make it possible to analyze data packets of a digital communication network. SOLUTION: Analyzers 36 and 36A to 36D are arranged for ports of the digital transmission network 10. The analyzers 35 and 36A to 36D have clocks for their internal timing and time stamps of data packets. To synchronize the time stamping of the packets, the clock outputs of analyzers which join in a test are connected together. A CPU for control commands one analyzer to supply a clock to other analyzers. A master analyzer commands other analyzers to disable their clocks and brings them under the timing control of the clock of the master analyzer. The headers and time stamps of packets are transmitted between analyzers for analysis. This mutual communication uses another path interconnecting all the analyzers and CPU.