发明名称 ELECTRIC POWER EVALUATING METHOD FOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE: To provide an electric power evaluating method for the integrated circuit based upon high-precision, fast probability calculation in consideration of inter-signal correlation. CONSTITUTION: The difference Pe -Pa between the strict value Pe of a probability quantity attached to an output node, which is represented by the probability (signal probability) that the logical value of the output node of each logic gate becomes 1 and the probability (switching probability) that the logical value of the output node of each logic gate varies and a value Pa calculated while the inputs of logic gates are considered to be all independent of each other is expanded into a series as to the probability quantity corresponding to the input signal of the whole circuit, and a finite number of terms are found as correction terms, and the value obtained by adding the correction terms to the value Pa is used as an approximate value of the probability quantity to evaluate the electric power of the integrated circuit.</p>
申请公布号 JPH08249372(A) 申请公布日期 1996.09.27
申请号 JP19950055867 申请日期 1995.03.15
申请人 TOSHIBA CORP 发明人 UCHINO MIGAKU;MIHASHI TAKASHI
分类号 G06F17/50;G06F19/00;G06Q50/00;G06Q50/04;(IPC1-7):G06F17/50;G06F17/00 主分类号 G06F17/50
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