SEMICONDUCTOR MEMORY DEVICE

摘要

The semiconductor memory cell has the feature that a number of bit lines(BL) and a number of word lines(WL) are crossed each other perpendicularly on a memory cell array where unit memory cells are aligned regularly on a silicon bulk, and a MOS selection transistor(200) is formed on the region where the word line(WL) and the active region of the unit memory cell are crossed each other, and the drain of the selection transistor(200) is connected to the base(B) of a bipolar transistor(300) and the bit line(BL) is connected to the emitter(E) of the bipolar transistor(300) and the collector(C) of the bipolar transistor(300) is grounded.