发明名称 DECODER OF INPUT MODULATION SIGNAL
摘要 PROBLEM TO BE SOLVED: To easily restore an encoded signal by providing a decoding device with a bit determination means and a bit metric supplying means and determining the 1st bit of a data symbol based on two bit metrics. SOLUTION: A demap 110 consists of a hard decision block 130 and a bit metric decision block 140. The block 140 determines two bit metrics METRIC1, METRIC2. These two bit metrics METRIC1, METRIC2 are used for decoding a 1/2 binary convolution code. Namely a Viterbi decoder 120 receives these two metrics METRIC1, METRIC2, decodes the convolution code by using soft decision algorithm and generates a restored code X1'. An error can be efficiently corrected by using the decoder 120. The restored MSB X2' and LSB X1' are supplied to a succeeding processing block in a GA HDTV encoding device to process them.
申请公布号 JPH08242264(A) 申请公布日期 1996.09.17
申请号 JP19950308971 申请日期 1995.11.28
申请人 DAIU DENSHI KK 发明人 NIN RIYUUKI
分类号 H04N19/00;H03M5/06;H03M13/23;H03M13/39;H04L1/00;H04L25/06;H04L25/08;H04L27/00;H04L27/04;H04L27/06;H04L27/38;H04N19/65;H04N19/89 主分类号 H04N19/00
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