发明名称 MANUFACTURE OF THREE-DIMENSIONAL INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide the method of producing three dimensional integrated circuits with which yield is improved and manufacturing cost is reduced. SOLUTION: A first and a second component base layers 1 and 7 with which two processes are completed are combined. The second component base layer 7 is functionally tested in advance and perfect chips having the functional performance of the second component layer 7 are selected by the function test. Then, the second component base layer 7 is sliced thinner from the backside and separated to each of chips. Then, only the selected complete chips having the functional performance are arranged on the first component base layer 1 with an adhesive layer on it, adjusted and pasted on it.
申请公布号 JPH08213548(A) 申请公布日期 1996.08.20
申请号 JP19950244732 申请日期 1995.09.22
申请人 FRAUNHOFER GES ZUR FOEDERUNG DER ANGEWANDTEN FORS 发明人 PEETAA RAMU;RAINHOORUDOU BUTSUFUNERU
分类号 H01L25/00;H01L21/68;H01L21/86;H01L21/98;H01L25/065;H01L27/00 主分类号 H01L25/00
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