发明名称 MEMORY CIRCUIT
摘要 <p>PURPOSE: To input two kinds of address signals during one cycle time of a clock signal and to output the content of a designated address as a memory output signal in a memory circuit for a semiconductor integrated circuit. CONSTITUTION: A decoder circuit 12 which is constituted of a decoder part 13, a two-input multiplexer 10 and a control signal generation circuit, selects one out of two kinds of address signals which have been input. Then, the decoder circuit 12 decodes a word signal and a select signal. The content of an address which is selected by the word signal and the select signal is latched by a control signal from the decoder circuit 12 so as to be output as a memory output signal.</p>
申请公布号 JPH08212785(A) 申请公布日期 1996.08.20
申请号 JP19910285300 申请日期 1991.10.31
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 MORIKAWA NOBUHITO;DEMURA SHIGEKI
分类号 G11C11/41;G11C11/413;(IPC1-7):G11C11/41 主分类号 G11C11/41
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