| 摘要 |
PURPOSE: To improve the handling and operating performance for a synchronous memory which receives an access synchronously with a system clock and also for an information processor which has the synchronous memory by restarting smoothly the operation that is continuously carried out before a series of read/ write operations are discontinued even after the internal state value is read and written by the scanning operations, etc., after discontinuation of the preceding read/write operations. CONSTITUTION: When a normal operation is restarted, the information stored in the two-stage address backup registers 10 and 11 and the two-stage data backup registers 12 and 13 are selected in sequence and outputted to a synchronous memory 1. Thereby, an address register 2, a data input register 3 and a data output register 4 of the memory 1 are restored into the same state as that set before discontinuation of the normal operation. |
