发明名称 SIGMOID CORRECTION ADJUSTMENT CIRCUIT
摘要 PURPOSE: To reduce components and to perform appropriate sigmoid correction corresponding to plural horizontal scanning frequencies by turning on and off a switch connected to a sigmoid correction capacitor within respective horizontal scanning cycles. CONSTITUTION: When signals for turning off an FET 8 for switching are inputted to the gate of the FET 8 at a timing t1 from a switch control circuit 10, a current made to flow to the sigmoid correction capacitor 7 is cut off at the timing t1 as well. As a result, the FET 8 is turned off and a charging current is made to flow only to the sigmoid capacitor 6 of this sigmoid correction adjustment circuit A. The sigmoid capacitor 6 is charged up to maximum corresponding to the horizontal scanning cycle at the timing t2 of a scanning period and the capacitor 6 is discharged after the timing t2. A horizontal output transistor 1 is turned on by the discharging and a discharging current is made to flow from the capacitor 6 in the route of a linearity coil 5, a deflection yoke 4, the transistor 1 and the capacitor 6.
申请公布号 JPH08204982(A) 申请公布日期 1996.08.09
申请号 JP19950027426 申请日期 1995.01.23
申请人 TOTOKU ELECTRIC CO LTD 发明人 SATO KAZUHIRO;IWAMA SHINOBU;HAYASHI SHIGEO
分类号 H04N3/16;H04N3/27;(IPC1-7):H04N3/27 主分类号 H04N3/16
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