发明名称 METHOD AND APPARATUS FOR POWER ARITHMETIC IN ENCODED SYSTEM
摘要 <p>PURPOSE: To provide power operation method for more quickly executing a modular power operation based on a fixed basic element required in an enciphering system, and a device therefor. CONSTITUTION: This method comprises an exponent dividing process of dividing the bit line of exponent R, a process of generating a bit line Ri ,j from the exponent R, a process of generating Ri ,j in binary numeral form, a process of generating gi by use of a base g, process of generating g by use of Ri ,j and gi , a process of calculating and storing G[j[ [f] to an integer (f) and an integer (j), and a process of calculating gR, and this method has a good performance although it is extremely simplified. This method is applicable to various calculating environments with good accommodation by the trade-off of time memory capacity in a wide range. Particularly, the calculating speed by a smart card having an extremely small memory part can be basically improved. Further, the calculating speed of gRyE form can be also improved.</p>
申请公布号 JPH08202263(A) 申请公布日期 1996.08.09
申请号 JP19950017333 申请日期 1995.02.03
申请人 SAMSUNG ELECTRON CO LTD;RI HITSUCHIYUU;HAYASHI SAIKUN 发明人 RI HITSUCHIYUU;HAYASHI SAIKUN
分类号 G09C1/00;H04L9/00;H04L9/06;H04L9/10;H04L9/14;H04L9/28;H04L9/30;(IPC1-7):G09C1/00 主分类号 G09C1/00
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