| 摘要 |
PURPOSE: To obtain a smooth synthesis sound when the interval of the synthesis sound is changed continuously and to increase the number of simultaneous pronounciation when time division multiplexing. CONSTITUTION: This synthesizer is constituted with a drive data generation circuit 101, an adder 107 adding the drive data to the synthesis data, a data storage circuit 102 delaying the addition data by a prescribed time and outputting as the delay data, a whole band-pass filter 103 delaying the delay data by a prescribed time and outputting as the synthesis data, a delay control circuit 104 deciding the delay times of the data storage circuit 102 and the whole band-pass filter 103 and an interpolation operation circuit 201 performing the interpolation operation of the data preserved in the data storage circuit 102 with the delay data before one sample when the pitch is fluctuated and transferring the operation result to the whole band-pass filter 103, and the delay control circuit 104 decides the interval of the synthesis data by setting the delay time of the data storage circuit 102 and the delay time of the whole band-pass filter 103. |
