| 摘要 |
The display apparatus includes a host processor having associated main memory, and a display processor (28', 49 etc.) having an associated texture memory (41') for storing a pyramidal or part-pyramidal array of texture element ("texel") values. Each pyramidal array includes a plurality of two-dimensional (2-D) arrays representing a 2-D modulation pattern at at least two distinct levels of resolution. The display processor further includes a circuit (28') for generating 2-D coordinate pairs (U1, V1) addressing texel values in a stored 2-D array, and 2-D interpolators (BIL1, BIL2) responsive to fractional parts (U1f, V1f) of the 2-D coordinate pairs for combining together a number of texel values from the addressed array so as to generate an interpolated texel value (MOD1). The apparatus further includes feedback (70,76 etc.) whereby interpolated texel values generated by the 2-D interpolators from one 2-D array can be stored back in the texture memory (41') to form a further 2-D array of the pyramidal or part-pyramidal array. This enables the high-speed generation of the successively pre-filtered arrays required to form a pyramidal array from a single externally-generated higher-resolution array.
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