发明名称 Video signal processing apparatus, video signal processing method, and video signal recording/reproduction apparatus
摘要 A video signal processing apparatus, video signal recording/reproduction apparatus, and method therefor, perform arithmetic operations upon an input video signal and the input signal delayed by a predetermined amount of time. A memory stores the input signal for the predetermined amount of time in order to produce the delayed input video signal. A controller controls the memory to store the input video signal for the predetermined amount of time based on a main synchronization signal. A first synchronization signal is produced by separating a synchronizing signal from the input video signal. A second synchronization signal is generated based on the first synchronization signal. During operation, a switching unit supplies the first synchronization signal to the controller as the main synchronization signal until the second synchronization signal becomes synchronized with the first synchronization signal. Once the second synchronization signal becomes synchronized with the first synchronization signal, the switching unit supplies the second synchronization signal to the controller as the main synchronization signal. In this manner, jitter caused by noise or distortion in the first synchronization signal separated from the input video signal is eliminated by the switching to the second synchronization signal. The second synchronizing signal is not affected by noise or waveform distortion; and consequently, arithmetic operations in the correct time axis are performed.
申请公布号 US5543854(A) 申请公布日期 1996.08.06
申请号 US19940355160 申请日期 1994.12.08
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MORIKAWA, YASUHIRO;OHASHI, TOMONORI;KODAMA, MASAFUMI
分类号 H04N5/06;H04N5/08;H04N5/21;H04N5/46;H04N5/907;H04N5/937;H04N5/956;H04N9/896;(IPC1-7):H04N9/475 主分类号 H04N5/06
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