发明名称 SIMULTANEOUS PROCESSOR OF SCRAMBLED & NON-SCRAMBLED SIGNAL
摘要 The device, which includes a buffer (1), an inverter (2), a multiplexer (3), a data extractor (4), and a pn-code generator (6), comprises: a memory (7) for storing the non-scrambling information; a data comparator (8) for comparing the non-scrambling information stored in the memory (7) with the pn-code key information extracted by the data extractor (4) to determine whether the input video signal is a scrambled or non-scrambled signal, and generating a selective control signal; a display (9) for displaying the result of the comparison by the comparator (8); and a selector (10) for selecting the output of the pn-code generator (6) or a permanent HIGH signal according to the selective control signal and supplying it to the multiplexer (3) so that the multiplexer (3) may select the output signal of the buffer (1) or the inverter (2).
申请公布号 KR960010502(B1) 申请公布日期 1996.08.01
申请号 KR19930027990 申请日期 1993.12.16
申请人 DAEWOO ELECTRONICS CO., LTD. 发明人 LEE, TAE - HO
分类号 H04N7/167;(IPC1-7):H04N7/167 主分类号 H04N7/167
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