| 摘要 |
A pair of vertical DMOS transistors include a threshold adjust implant which extends across the sources and body regions and into a common drain region of the devices, the threshold adjust implant having a peak dopant concentration whose depth into the semiconductor body is non-uniform laterally across the devices. A process for fabricating the transistors includes a high temperature, long diffusion subsequent to deposition of the polysilicon gates for forming body regions. The threshold voltage of the VDMOS devices is adjusted subsequent to both gate formation and the high temperature, long duration body diffusion by implanting a suitable p-type dopant into the VDMOS channels through the insulated gates, after formation thereof. Since the gates are formed prior to threshold adjust, high temperature processing and long duration diffusions requiring the presence of the gate may be completed prior to threshold adjust, without risk to the adjusted device threshold. |
