发明名称 CIRCUIT FOR LATCH INPUT DATA AND METHOD THEREOF
摘要 An input data latch circuit and method are provided to reduce the area of a semiconductor memory device and to reduce unnecessary current consumption, by making the circuit configurations of latches for directly latching an input signal equal and the circuit configurations of the other latches different from that of the latches for direct-latching. A buffer outputs an input signal by buffering input data according to a write command. A first latch(200) latches the input signal by aligning to a first data strobe signal and outputs first rising data. A second latch latches the input signal by aligning to a second data strobe signal and outputs first falling data. A third latch latches the first rising data by aligning to the second data strobe signal and outputs second rising data. The first latch and the second latch latching the input signal have the same circuit configuration, and the third latch has a different circuit configuration from the first and second latches.
申请公布号 KR20070028912(A) 申请公布日期 2007.03.13
申请号 KR20050083681 申请日期 2005.09.08
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, YONG MI;CHO, HO YOUB
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
主权项
地址