| 摘要 |
PURPOSE: To increase the electrostatic breakdown strength of an MOS FET without making a dead space on an LSI chip. CONSTITUTION: An input terminal 1 and an input resistor 4, which is connected with this terminal 1 and consists of an N-type diffused layer, are provided on a P-type semiconductor substrate. Moreover, source diffused layers 51 and 52 of N-channel MOS FETs 101 and 102 for internal circuit are respectively connected with a grounding wire 3. As the FET 101 is within a short distance from the resistor 4, the connection of the wire 3 with the layer 51 is made via a tungsten silicide wiring 11, whereby a resistance is added to the FET 101 and the electrostatic breakdown strength of the FET 101 is increased. Thereby, a dead space in the vicinity of the resistor 4 is eliminated and a reduction in the area of a chip is made possible. |
