| 摘要 |
Operation apparatus for deriving an error position polynomial GAMMA (x) and a Forney syndrome polynomial T(x) of a Galois field capable of reducing the required number of Galois field multipliers to one, irrespective of the maximum error correction capacity in a Galois field operation, thereby reducing the chip area and achieving a correct operation. The operation apparatus comprises a storing register for storing result values sequentially inputted therein, a multiplexor for receiving outputs from the storing register and selecting a necessary coefficient therefrom, a first register and a second register for storing a coefficient currently selected by the multiplexor and a coefficient previously selected by the multiplexor, respectively, a multiplier for multiplying a value corresponding to an input erasure position and the coefficient stored in the second register, and an adder for adding a value outputted from the multiplier to the coefficient stored in the first register and inputting the resultant value to the storing register.
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