发明名称 TIMING EXTRACTION CIRCUIT
摘要 PURPOSE: To realize sampling time extraction in a digital subscriber line transmission system with a small circuit scale and high accuracy. CONSTITUTION: A deviation correction coefficient counter 16 counts deviation correcting quantity in a reception period of a frame synchronizing signal from a frame synchronization circuit 12 from a timing control signal outputted from a phase comparator 11 in the above reception period, and outputs a deviation correcting quantity signal. A smoothing circuit 17 calculates frequency deviation quantity from the deviation correcting quantity signal outputted from the counter 16, and outputs a deviation correction control signal so as to obtain corrected deviation quantity uniform for one frame period. The timing control signal (UP1, DOWN1) outputted from the phase comparator 11 and the deviation correction signal outputted from the deviation correction smoothing circuit 17 are inputted to a filter 13 via an OR circuit. The filter 13 counts an input signal, and outputs a control signal (UP2, DOWN2) to control a timing generation circuit 14.
申请公布号 JPH08186564(A) 申请公布日期 1996.07.16
申请号 JP19940337080 申请日期 1994.12.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIRASAKI YOSHIMASA;TANAKA TSUTOMU
分类号 H04L7/033;H04B1/10;H04L7/08 主分类号 H04L7/033
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