| 摘要 |
<p>There is disclosed an integrated circuit including a sense amplifier (16) capable of encoding 2<n> levels of output characteristic into a bit pattern of n corresponding bits. The sense amplifier (16) includes a non-zero detect circuit (not shown) for detecting when the output characteristic is zero and also includes 2<n>-2 comparators (20) for comparing an output characteristic to 2<n>-2 reference levels when the output characteristic is non-zero. The 2<n>-2 reference levels are constructed from 2<n>-2 non-zero levels of the 2<n> possible levels of output characteristic. An encoder (not shown) is coupled to the non-zero detect circuit and the comparators and encodes the output from the non-zero detect circuit and the outputs from the comparators (20) to corresponding predetermined bit patterns. When the output characteristic is determined to be zero by the non-zero detect circuit, the bit pattern output is a default bit pattern. When the output characteristic is non-zero, the bit pattern takes on predetermined values determined by which pair of reference levels the output characteristic falls between, or whether the output characteristic is greater than the largest reference level or less than the smallest reference level. <IMAGE></p> |
