发明名称
摘要 PURPOSE:To realize integration of high degree and high performance by a method wherein silicon is selectively epitaxially grown in a hole part formed in an insulating film on a source region or a drain region of a memory cell transistor, and one side capacitor electrode of a memory cell capacitor is formed. CONSTITUTION:An element isolation oxide film 102 is formed on a substrate 101, and a gate oxide film 103, a polycrystalline silicon film and a silicon oxide film 105 are deposited: an gate electrode 104 is formed by patterning; a side wall 107 composed of an oxide film is formed; by anisotropic etching, a bit line contact hole 109 is covered with a silicon oxide film 118, in a self alignment manner with the gate electrode; silicon is selectively grown on a capacitor contact part 110 where the silicon substrate is exposed, and a capacitor electrode 112 is formed. Thereby, alignment with the contact hole is automatically enabled, the capacitor electrode can be formed in a short manufacturing process, and integration of high degree and high performance are realized.
申请公布号 JP2513287(B2) 申请公布日期 1996.07.03
申请号 JP19880297579 申请日期 1988.11.24
申请人 NIPPON ELECTRIC CO 发明人 MIKOSHIBA KEIMEI
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
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