| 摘要 |
PURPOSE: To provide a random block display controller reducing a load of a CPU and without a large capacity memory. CONSTITUTION: A random counter 1 generates four-bit random number data A0-A3 eliminating regularity in the horizontal direction corresponding to respective blocks in the horizontal direction based on a horizontal synchronizing signal Hsync. The data B0-B1 selected from the data A0-A3 by a4 C2 selector 2 become a selection signal Sel according to the gate control data D0-D3 in a gate 4 after being converted into the data C0-C3 of four bits by a decoder 3. An image signal VA and the image signal VB ar synthesized with a switch 7 at every block by the selection signal Sel. |
