VARIABLE CONSTANT PROPORTION DIVIDER

摘要

The variable non-integer dividing circuit comprises: a variable control part (20) which has a decrease control part (21) which generates a decrease control signal (IN_DEC) synchronized with the clock pulse according to the frequency decrease signal (DECMT) and an increase control part (31) which generates an increase control signal (IN_INC) synchronized with the clock pulse according to the frequency increase signal (INCMT); a count control part (46) which outputs a count control signal according to IN_DEC and IN_INC signal; a count part (41) which counts and divides the pulse according to the count control signal.