发明名称 |
DECODER WITH CONTROLLING MEANS |
摘要 |
an encoder (10) which encodes digital data by Variable Length Transform; a buffer (20) which transmits data from the encoder (10) at a constant speed; a subtracter (33) which subtracts the write clock signal (WR CLOCK) and the read clock signal (RD CLOCK) applied to the buffer (20); a buffer occupation detector (3400) which detects the amount of data occupation of the buffer (20); a quantization parameter transmitter (3401) which prevents the overflow and the under flow of the buffer (20) by controlling the amount of information generated by feedback of quantization parameter (QP1 - QPN) to the encoder (10).
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申请公布号 |
KR960008462(B1) |
申请公布日期 |
1996.06.26 |
申请号 |
KR19930029698 |
申请日期 |
1993.12.24 |
申请人 |
INSTITUTE FOR ADVANCED ENGINEERING |
发明人 |
KIM, HAN - SOO |
分类号 |
H03M1/32;(IPC1-7):H03M1/32 |
主分类号 |
H03M1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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