| 摘要 |
PURPOSE: To reduce circuit scale by applying code phase synchronism and clock synchronism common to all channels by a diffusion code channel only for synchronism. CONSTITUTION: A parallel/serial(P/S) converter 101 in a transmitter divides input data into the pieces of parallel data of the number (n) equal to a code dividing/multiplexing number. A diffusion code generator 103 generates respectively different (n+1) diffusion codes PN0 to PNn having the same code period and directly inputs the code PN0 to be used only for synchronism and carrier reproducing to an adder 104. A synchronizing circuit 203 in a receiver steps up diffusion code synchronism and clock synchronism for a transmitting signal by the use of a reference diffusion code inputted from a code generator 204. Since it is unnecessary to prepare a synchronizing circuit in each data channel and a correlating device for demodulating a data channel is constituted of a base band demodulating circuit 206 to be a digital signal processing circuit, the circuit scale can be reduced. |
