发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: To provide a semiconductor integrated circuit capable of obtaining a required boosted voltage while suppressing the increase of a chip size and current consumption and preventing the deterioration in performance even when an external source voltage is lowered. CONSTITUTION: A transistor NT1 is connected between the external source voltage Vcc and an output node 11, and when the voltage of the output node 11 is increased to the boosted voltageϕBT, the transistor NT1 is conducted first by a first signalϕ1, and it makes the output node 11 increase to the same voltage as the external source voltage Vcc. The transistor PT1 is connected between a boosting circuit 12 and the output node 11, and is conducted by a second signalϕ2 delayed by a prescribed time than the first signalϕ1, and it makes the voltage of the output mode 11 to the boosted voltageϕBT. The transistor NT2 is connected between the output node 11 and the ground, and when the output node 11 is made grounded potential, the transistor NT2 is conducted by a third signalϕ3.
申请公布号 JPH08167288(A) 申请公布日期 1996.06.25
申请号 JP19940305983 申请日期 1994.12.09
申请人 TOSHIBA CORP 发明人 KANEKO TETSUYA
分类号 G11C11/407;G11C8/08;G11C11/408;G11C11/409;H01L21/822;H01L27/04;H02M3/07;(IPC1-7):G11C11/407 主分类号 G11C11/407
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