发明名称 FORMATION OF PATTERN, PRODUCTION OF RETICLE AND SEMICONDUCTOR DEVICE
摘要 <p>PURPOSE: To prevent a short circuit by conductive particles from occurring and to flatening an interlayer insulating film covering a wiring layer, etc., by suppressing a pattern jumping or a narrow pattern forming at the time of transferring a dummy pattern in a method for forming a pattern including a dummy pattern forming process. CONSTITUTION: The dummy pattern 22 separated from a main pattern 21 at least by a space W is formed, the dummy pattern 22 is partially removed by a removing pattern 23, the dummy pattern group 22d-22h divided and separated from each other are formed. Small dummy patterns 22f, 22h which are below minimum allowable width (a) or below minimum allowable area S among dummy pattern group 22d-22h and the dummy pattern 22d adjacent to the small dummy patterns 22f, 22h are connected by a connection dummy pattern 22i or small dummy patterns 22e, 22g are removed.</p>
申请公布号 JPH08160590(A) 申请公布日期 1996.06.21
申请号 JP19940307973 申请日期 1994.12.12
申请人 FUJITSU LTD 发明人 MOTOYAMA TAKUYUKI;HARADA HIDEKI;TSURU TAKAYUKI
分类号 G03F1/00;G03F1/68;G03F1/70;H01L21/027;H01L21/3213;H01L23/528;H01L27/02;(IPC1-7):G03F1/00 主分类号 G03F1/00
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