| 摘要 |
<p>The voltage adjusting appts. has an input receiver logic circuit (18) and an output driver logic circuit (16), both connected to a bond pad (20) which provides for mechanical connection to a pin from an integrated circuit chip. The output driver drives logic signals generated on-chip through the bond pad at an appropriate PCI bus voltage level, whereas the input receiver receives a logic signal entering the chip, compares the input to a preset threshold trip-point, and drives it into the chip at the appropriate voltage level. A voltage sense circuit (12) monitors the voltage at a PCI bus and outputs a LOW or HIGH signal depending on whether the bus is operating in a high (5V) or low (3.3V) voltage range. This is done in the presence of an enabling signal at an input (14) i.e. the chip reset signal, and the result is stored on removal of the enabling signal.</p> |
