发明名称 LEVEL CONVERTING CIRCUIT
摘要 PURPOSE: To reduce power consumption without complicating circuit configuration by coupling a pseudo ECL level output circuit through a capacitor to an ECL input circuit in AC manner and providing a DC reproducing function at a clamp circuit. CONSTITUTION: A PECL(pseudo level) output circuit 11 is pulled down by a resistor 12 and outputs a signal, whose amplitude is about 0.8V, on the conditions of VOL≈3.4V and VOH≈4.2V. The DC level of the output signal is changed by the mark rate of the output signal while being accompanied with a transient phenomenon. The input signal voltage value of an ECL level input circuit 14 is set by a clamp circuit 15 so as to be about -1.2V when the mark rate is 1/2. This value is the central voltage of an ECL level and when the mark rate is 1/2, the conditions of VOL≈1.6V and VOH≈-0.8V are established. Besides, when the mark rate is 1/2, a capacitor is turned in a charging direction but a diode 16 is turned to a conducted state and holds the values of the VOL and VOH. Further, when the mark rate is 11/12, the capacitor 13 is turned to discharging direction and the diode 16 is turned to a cut-off state and holds the values of the VOL and VOH at the time of 1/2 mark rate.
申请公布号 JPH08154049(A) 申请公布日期 1996.06.11
申请号 JP19940293048 申请日期 1994.11.28
申请人 NEC CORP 发明人 NIIE TOSHIFUMI
分类号 H03K19/086;H03K19/0175;(IPC1-7):H03K19/017 主分类号 H03K19/086
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