发明名称 PLL CIRCUIT AND WIRELESS INSTALLATION USING THE CIRCUIT
摘要 PURPOSE: To provide a fast and stable PLL circuit which has a loop filter switching function and can optimize the loop filter switching time. CONSTITUTION: A memory 110 stores the data on the optimum loop filter switching time for every difference caused between the unswitched frequency and the switched one of a PLL circuit. When the frequency of the PLL circuit is switched, the frequency is fast pull in by a 1st loop filter 107 of a small time constant. Then the data are read out of the memory 110 in response to the difference of switching frequency, and a loop filter switching control signal is produced. This control signal is sent to a loop filter changeover switch 106 so that the filter 107 is switched to a 2nd loop filter 108 of a larger time constant. Thus the operation of the PLL circuit is stabilized.
申请公布号 JPH08149004(A) 申请公布日期 1996.06.07
申请号 JP19940290165 申请日期 1994.11.24
申请人 SANYO ELECTRIC CO LTD 发明人 TAKAHASHI YOSHIHIDE
分类号 H03L7/187;H03J7/02;H03L7/107;H04B7/26 主分类号 H03L7/187
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