发明名称 Process of fabricating high-performance facet-free small-sized bipolar transistor
摘要 After a formation of a side wall of silicon nitride on an inner periphery defining an emitter hole passing through a silicon nitride layer and a heavily doped polysilicon base electrode layer, a silicon oxide layer on a collector region is isotropically etched so as to expose an upper surface of the collector region and a bottom surface of an inner peripheral portion of the heavily doped polysilicon base electrode layer, and a ring-shaped hollow space beneath the polysilicon base electrode layer is filled with a piece of polysilicon so that the dopant impurity is diffused from the doped polysilicon layer independently from a selective growth of a base layer over the collector region.
申请公布号 US5523245(A) 申请公布日期 1996.06.04
申请号 US19950427844 申请日期 1995.04.26
申请人 NEC CORPORATION 发明人 IMAI, KIYOTAKA
分类号 H01L29/73;H01L21/331;H01L29/10;H01L29/732;(IPC1-7):H01L21/265 主分类号 H01L29/73
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