发明名称 Microcomputer having ALU performing min and max operations
摘要 All data to be compared are stored in a register group (1) in advance. When a MIN operation is executed, a maximum value (e.g, FF) is initially set in a memory (2). Source data outputted by the register group (1) and destination data outputted by the memory (2) are applied to a full adder/subtractor (30) operating as a subtractor. The subtractor (30) outputs a borrow signal when an item of source data is smaller than an item of destination data. In response to the borrow signal, an AND gate (33) is enabled, so that the item of source data is written in the memory (2) as a new item of destination data. When an item of source data is equal to or greater than an item of destination data, the borrow signal is not delivered as an output, the AND gate (33) is disabled and a new item of data is not stored in the memory (2). The foregoing operation is repeated with regard to all data in the register group (1). Eventually, a state is attained in which the smallest item of data among the data in the register group (1) is stored in the memory (2). In a MAX operation, a minimum value (e.g, OO) is set in the memory (2) as initial data. When the borrow signal is not outputted, the AND gate (33) is enabled. Eventually, a state is attained in which the largest item of data among the data in the register group (1) is stored in the memory (2).
申请公布号 US5524251(A) 申请公布日期 1996.06.04
申请号 US19900548571 申请日期 1990.07.05
申请人 OMRON CORPORATION 发明人 URASAKI, KAZUAKI
分类号 G06F7/02;G06F9/30;G06F9/302;G06F9/44;G06F17/18;G06N7/02;(IPC1-7):G06F17/10 主分类号 G06F7/02
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